These methodologies deliver 3D chip-stacking support in the System-on-Integrated-Chips (TSMC-SoIC ™) technology and 2.5/3D advanced packaging support in Integrated Fan-Out (InFO) and Chip-on-Wafer-on-Substrate (CoWoS ®) technologies. By leveraging Synopsys' 3DIC Compiler platform, customers significantly advance high-capacity 3D system design through efficient access to TSMC 3DFabric ™-based design methodologies. Synopsys, Inc. (Nasdaq: SNPS) today announced it has expanded its strategic technology collaboration with TSMC to deliver the next level in system integration to address the increasingly critical performance, power and area targets for high-performance computing (HPC) applications.
![synopsys address mountain view synopsys address mountain view](https://patch.com/img/cdn/users/38163/2012/05/raw/47001cc14d294f7c5cf975d8e4ad6f43.jpg)
![synopsys address mountain view synopsys address mountain view](https://i0.wp.com/news.theregistrysf.com/wp-content/uploads/2019/01/445-465-North-Mary.jpg)
Synopsys 3DIC Compiler, the unified, multi-die implementation platform, seamlessly integrates TSMCģDFabric technologies-based design methodologies, to offer a complete exploration-to-signoff design platform.Expanded strategic collaboration delivers comprehensive 3D-system integration capabilities, enabling the aggregation of hundreds of billions of transistors in a single package.